1. Field of the Invention
This invention relates to driver circuits for sinking current to two supply voltages. More particularly, this invention relates to driver circuits for driving a gate of an insulated gate bipolar transistor.
2. Background Information
FIG. 1 (Prior Art) shows a gate driver 1 for driving the gate of a gate insulated bipolar transistor ("IGBT") 2. Such a gate driver should provide a relatively high output voltage of 10 to 15 volts in order to enhance adequately the conductivity of the IGBT so that conduction losses are minimized when the IGBT conducts from collector to emitter. FIG. 1 shows a load 3 connected between a positive relatively high supply voltage source V.sub.+HV and the collector of the IGBT 2. In order to switch the IGBT off, however, the driver 1 must also be capable of quickly discharging the gate-to-emitter and gate-to-collector capacitances of the IGBT, C.sub.ge and C.sub.gc, respectively in order to effectively pull down the base of the IGBT 2. A low impedance supply voltage line 4 connects to the emitter of the IGBT to a zero volt ground in order to accommodate the pulse of capacitive discharge current when the voltage on the gate is increased and in order to conduct the high conduction current from the emitter when IGBT 2 is switched on.
During switching off of IGBT 2, the voltage on the collector of the IGBT increases rapidly. FIGS. 2A, 2B and 2C show the gate-to-emitter voltage V.sub.ge of IGBT 2 of FIG. 1, the collector current I.sub.c of IGBT 2 of FIG. 1, and the collector-to-emitter voltage V.sub.ce of IGBT 2 of FIG. 1. As FIGS. 2A-2C show, the rapid decrease in gate-to-emitter voltage V.sub.ge associated with IGBT 2 switching off results in a rapid decrease in collector current Ic as well as a rapid increase in the collector-to-emitter voltage V.sub.ce. This rapid increase in the collector-to-emitter V.sub.ce voltage causes a temporary increase in the gate-to-emitter voltage V.sub.ge due to capacitive coupling of the gate-to-collector capacitance C.sub.gc of IGBT 2. During the time when the IGBT collector exhibits its highest rate of increase in voltage as seen in FIG. 2C, current flow through the gate-to-collector capacitance may exceed the ability of driver circuit to sink current from the gate of the IGBT 2. If the gate-to-emitter voltage momentarily rises above the threshold voltage V.sub.t of the IGBT shown in FIG. 2A, the IGBT may momentarily switch back on despite the fact that driver circuit 1 is attempting to switch IGBT 2 off.
The consequence of this momentary switching on of IGBT 2 when the IGBT is in the process of being switched off is a high conduction current I.sub.c and a simultaneous high collector-to-emitter voltage V.sub.ce. This high current and high voltage situation results in a large amount of power being dissipated. The IGBT may therefore be pushed beyond its safe operating region resulting in a loss of circuit efficiency and possible device breakdown.
Gate driver circuits with low impedance pull down devices are known. Although these drivers are able to sink higher currents from the gate of the IGBT to ground, these drivers nevertheless still result in momentary false turn-on situations due to the decrease of the threshold V.sub.t of the IGBT with increasing temperature. Although it is possible to compensate for this decrease in V.sub.t with temperature by increasing the threshold of the IGBT, such compensation results in a deleterious decrease in device efficiency during conduction.
What is needed is a low impedance pull down gate driver which can pull the potential of the gate of the IGBT below the potential of the emitter of the IGBT. FIGS. 3A (Prior Art) and FIG. 3B (Prior Art) show two such gate driver circuits which drive the gate of the IGBT below the potential of the IGBT emitter.
FIG. 3A (Prior Art) shows a CMOS inverter driver circuit comprised of an input terminal 31 connected to the gate of a PMOS transistor 32 and to the gate of a NMOS transistor 33. The source of PMOS transistor 32 is connected to +V.sub.DD which is, for example, +15 volts. The source of the NMOS transistor 33 is connected to V.sub.EE which is, for example, -5 volts. The drain of PMOS transistor 32 is connected to output node 34 which is connected to the gate of an IGBT to be driven 35. The drain of NMOS transistor 33 is also connected to the gate of IGBT 35. The emitter of IGBT 35 is connected to a ground supply voltage GND, for example, 0 volts.
FIG. 3B (Prior Art) shows a low impedance pull down bipolar inverter driver comprised of input terminal 37 connected to the base of an PNP bipolar transistor 38 and the base of an NPN bipolar transistor 39. The emitter of PNP bipolar transistor 38 is connected to +V.sub.DD which is, for example, +15 volts. The emitter of NPN transistor 39 is connected to V.sub.EE which is, for example, -5 volts. The collector of PNP transistor 38 is connected to output node 40 which is connected to the gate of an IGBT to be driven 41. The collector of NPN bipolar transistor 39 is also connected to the gate of IGBT 41. The emitter of IGBT 41 is connected to a ground supply voltage GND.
The problem with the low impedance pull down gate drivers of FIGS. 3A and 3B relates to the nature of the V.sub.EE supply voltage. The gate drivers of FIGS. 3A and 3B discharge the capacitive discharge current from the gate of the IGBTs only to the V.sub.EE supply voltage. The V.sub.EE supply voltage, unlike a ground supply voltage, usually has a relatively high series impedance. The V.sub.EE supply voltage is usually generated by an on-chip back bias charge pump circuit. Such charge pump circuits are usually designed to output small amounts of current. Accordingly, large surges of capacitive discharge current drawn from a standard V.sub.EE supply may result in a rise in the potential of the V.sub.EE supply itself. Although the gate driver is only driving the gate of an IGBT, the equivalent capacitance of the gate of the IGBT may exceed 5000 pF. To switch this large capacitance quickly can require a surge of several amperes of current. As a result, when the gate drivers of FIGS. 3A and 3B switch to pull the voltage on the gate of the IGBT down to the V.sub.EE supply voltage, large surges of current from the V.sub.EE supply may overburden the V.sub.EE charge pump, thereby causing the voltage supplied by the charge pump to rise several volts above V.sub.EE and thereby causing the voltage on the gate of the IGBT to rise.
Allowing V.sub.EE which powers the gate drive buffer to rise is equivalent to allowing the gate potential to rise. As a result, false turn on of the IGBT may occur despite the negative gate drive circuitry. What is needed is a gate drive circuit which sinks most of the gate drive current to a guaranteed low impedance supply such as ground, yet provides the beneficial noise margins of a negative gate drive to assure that the device remains off as desired under all conditions. Ground, it should be noted, is a guaranteed low impedance supply rail because it must be capable of conducting the potentially large current I.sub.C of the IGBT. Compared to this current level, the gate drive current requirements are negligible, (e.g., I.sub.gpeak =2A, I.sub.cpeak =300 A).